Jump Trading Group is committed to world class research. We empower exceptional talents in Mathematics, Physics, and Computer Science to seek scientific boundaries, push through them, and apply cutting edge research to global financial markets. Our culture is unique. Constant innovation requires fearlessness, creativity, intellectual honesty, and a relentless competitive streak. We believe in winning together and unlocking unique individual talent by incenting collaboration and mutual respect. At Jump, research outcomes drive more than superior risk adjusted returns. We design, develop, and deploy technologies that change our world, fund start-ups across industries, and partner with leading global research organizations and universities to solve problems.

Core Development is a global team of technologists who architect, build and maintain our world-class trading platform. From optimizing our core trading engine to building custom hardware, we leverage software & hardware engineering, data science and research, to deliver the infrastructure and tools that drive our trading and business needs.

What You'll Do:

We're seeking a talented Sr. Compiler Engineer to join our team to lead the development of compilers, debuggers, and tools for our in-house SoCs. In this role, you'll work with both pre-silicon models, post-silicon bring-up environments, and developing novel solutions with our trading teams. You'll focus on high throughput, low latency, real-time systems and collaborate with the ASIC design team to influence future architecture. Additionally, you'll develop and execute a tooling strategy, create exceptional solutions for the trading community, and provide mentorship to junior team members.

Skills You'll Need:

 

• At least 5+ years of compiler development experience.
• Strong understanding of embedded software development in a hardware environment.
• Direct experience with llvm, gcc, gdb, multicore systems, cross-compilation environments, embedded OS, and drivers.
• Full Software Development Kit (SDK) development cycle experience.
• A passion for development, strong work ethic, and continuous learning.
• Pragmatic problem-solving and ability to work independently or as part of a team.
• Degree in Computer Science / Computer Engineering or related field.
• Reliable and predictable availability 

Bonus Points:

• RTL development skills for embedded FPGA (SystemVerilog, Verilog, VHDL).
• Knowledge of industry-standard ASIC processes and workflows.
• Successful SDK releases to a user base.

 

Benefits

   - Discretionary bonus eligibility   - Medical, dental, and vision insurance   - HSA, FSA, and Dependent Care options   - Employer Paid Group Term Life and AD&D Insurance   - Voluntary Life & AD&D insurance   - Paid vacation plus paid holidays   - Retirement plan with employer match   - Paid parental leave   - Wellness ProgramsAnnual Base Salary Range $150,000—$200,000 USD